rev. 1.1 july 2009 www.aosmd.com page 1 of 4 AOZ1020AI-EVB ezbuck 2a synchronous buck regulator evaluation board note general description the aoz1020ai evaluation board is a fully assembled and tested circuit board built with the aoz1020ai buck regulator ic. it outputs an adjustable voltage up to 2a of continuous current. the evaluation board requires an input voltage from 4.5 to 16v. the output voltage is preset at 3.3v and can be adjusted down to 0.8v. the AOZ1020AI-EVB circuit has features like current limit, short circuit protection, input under voltage lock out, internal soft start and thermal shut down. it operates at a ?ed 500khz switching frequency. the integrated internal mosfets minimize component count, board area and total cost. the AOZ1020AI-EVB demonstrates the simple buck converter design. only one resistor value change is needed for different output voltage designs. the a oz1020ai-evb also supports single layer board design. features 4.5v to 16v operating input voltage range output voltage preset to 3.3v, adjustable to as low as 0.8v 2a continuous output current fixed 500khz pwm operation internal soft start open-drain power good output cycle-by-cycle current limit short-circuit protection thermal shutdown enables single layer board design applications p oint of load dc/dc conversion pcie graphics cards set top boxes d vd drives and hdd lcd panels cable modems t elecom/networking/datacom equipment evaluation board schematic vin 2 1 pgnd agnd 3 fb 4 58 comp en 6 lx 7 pg u1 rc 20k r1 31.6k r2 10k c1 226 cc 102 c2 226 c5 open cp open 1 2 l 4r7 c6 rg 10k c4 104 r3 0 r4 en gnd gnd vin c3 226 pg5v vo gnd vin gnd gnd gnd gnd en pg
a oz1020ai-evb rev. 1.1 july 2009 www.aosmd.com page 2 of 4 ta b le 1. component list output voltage is set by r1: r1= r2 ?(vout ?0.8) / 0.8. table 2 below shows the value of r1 at typical output v oltages. tab le 2. ref designation pa rt number description manufacturer c1, c2, c3 grm32er61e226ke15l cap, 22?/25v, 1210, x5r, 10% murata c4 grm188r71h104ka01d cap, 0.1?/50v, 0603, x7r, 10% murata c5, cp open cap, 0603 tdk, murata c6, cc c1608c0g1h102j cap, 1nf/50v, 0603, x7r 10% tdk grm188r71h102ka01d murata l vlf10040t-4r7n5r4 inductor, 4.7?, 5.4a tdk r1 31.6k res, 31.6k, 0603, 1% r2 20k res, 20k, 0603, 1% r3 0 res, 0, 0603 r4 open res, 0603, 5% r5, rc 10k res, 10k, 0603, 5% u1 aoz1020ai ic, max 2a, so8 aos v out (v) r1 (k ? ) r2 (k ? ) 0.8 1 open 1 2.49 10 1.2 4.99 10 1.5 8.66 10 1.8 12.7 10 2.5 21.5 10 3.3 31.6 10 5 52.3 10
a oz1020ai-evb rev. 1.1 july 2009 www.aosmd.com page 3 of 4 pcb layout figure 1. top silk screen figure 2. top layer figure 3. bottom layer
a oz1020ai-evb rev. 1.1 july 2009 www.aosmd.com page 4 of 4 as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose f ailure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a signi?ant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. alpha &omega semiconductor reserves the right to make changes at any time without notice. life support policy alpha & omega semiconductor products are not authorized for use as critical components in life support devices or systems. quick start guide 1. connect the terminals of load to vout and gnd port. 2. connect the dc power supply to vin and gnd port. set dc power supply voltage to between 4.5v and 16v. 3. en pin is connected to vin via a 0ohm resistor in the demo board. if a separate enable signal is desired, connect en pin to any voltage source between 2.0v and 16v. 4. measure input voltage at the vin and gnd ports to eliminate the effect of voltage drop on the wire between dc power supply and evaluation board. 5. measure output voltage at the vout and gnd ports to eliminate the effect of voltage drop on the wire between load and evaluation board. 6. use an oscilloscope to monitor the input ripple voltage across input capacitor c1. 7. use an oscilloscope to monitor the output ripple voltage across output capacitor c2. note: when testing the ripple voltage, remove the cap of the voltage probe and touch the probe tip directly across the vin or v out and gnd terminals, as shown in figure 4. figure 4. voltage ripple test v gnd
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